1. Field of the Invention
The present invention is related to an electronic information storage device, which can be used in Multi-Level Cell flash memory to revise the information.
2. Description of the Related Art
Nowadays, Flash Memory Technology has been widely used and makes it convenient to store the information into the flash memory instead of traditional hard disk. The Flash Memory is non-volatilizable with low power consumption, high reading/writing speed and anti-shock performance, which is widely used in PC, Notebook, PDA and Cell phone. NAND flash memory is one type of the Multi-Level Cell (MLC) flash memory and has many advantages such as large capacity, low cost and high reading/writing speed. In order to improve the capacity and cut down the cost further, a Single-Level Cell (SLC) flash memory with a Floating Gate is widely spread to save a NAND flash memory of the Multi-Level Cell flash memory which has two bits.
However, said NAND flash memory of Multi-Level Cell (MLC) flash memory still has some limitations comparing to the Single-Level Cell (SLC) flash memory. For example, after the memory segment of the NAND Flash memory has been erased up, Number-Of-Programming (NOP) of every memory page inside of the memory segment can only be set as 1. Other limitations such as short lifetime, long time programming, requirement of an Error Correction Code (ECC) with high correcting ability, further more, it is prerequisite to start reading from a memory page with a lower address in the memory segment while programming the information.
During programming the MLC flash memory, two bits of said Single-Level Cell flash memory form two memory pages in a same memory segment, which defines a pair of Paired Memory Pages: a LSB (Least Significant Bit) memory page and a MSB (Most Significant Bit) memory page. Although the LSB memory page and the MSB memory page are two different memory pages, actually, both said LSB memory page and MSB memory page store the information in a same memory segment. In said paired memory pages, the address of said LSB memory page is not adjacent to the address of said MSB memory page, which makes the LSB and MSB memory pages likely to record different instruction codes during the information is written. As a result, after the information is written into the LSB memory page, the instruction code may be suspended while the information is written into the MSB memory page, which may lead an error onto the LSB memory page and makes the information in the LSB memory page lost.
FIGS. 1A, 1B and 1C disclose a prior art about a programming process of the LSB memory page and the MSB memory page. As shown in FIG. 1A, the MLC flash memory includes four statuses during the programming process, such as “U”, “A”, “B” and “C”. Each status is shown as two binary bits which respectively define a Lower Bit of the LSB memory page and an Upper Bit of the MSB memory page. In FIG. 1B, when the information is written into the LSB memory page, the bit is programmed from “1” to “0” so that the status of MLC flash memory changes into “A” from “U” for writing the information into LSB memory page. If the information requires a bit “1” of the LSB memory page, the status will keep on “U” without changing. When the information is written into the MSB memory page, the bit of the LSB memory page will be programmed as follow:
(1) If both the Lower Bit of the LSB memory page and the Upper bit of the MSB memory page is “1”, the status of the MLC flash memory stays in “U”;
(2) If the Lower Bit of the LSB memory page is “1” and the Upper Bit of the MSB memory page is “0”, the status of the MLC flash memory is programmed from “U” to “C”;
(3) If the Lower Bit of the LSB memory page is “0” and the Upper Bit of the MSB memory page is “1”, the status of the MLC flash memory stays in “A”;
(4) If the Lower Bit of the LSB memory page is “0” and the Upper Bit of the MSB memory page is “0”, the status of the MLC flash memory is programmed from “A” to “B”.
In said paired memory pages, after the information is programmed into the LSB memory page, the control unit starts to program the information into the MSB memory page of said paired memory pages, meanwhile, if the power is suddenly disconnected, an error will occur to the MSB memory page, as a result, the information written on the MSB memory page will be lost. Even worse, the information previously written in the LSB memory page will be lost too.
Hence, it is desired to have a new electronic storage device with an improved storage method for storing the information in order to solve the problems above.